Project information

Short Details and Specifications

These are the projects to design schematic, layout and to simulate various logic gates, multiplexer, adder etc. I am using Electric VLSI design system to design schematic and LTSpice to simulate the results. All the layout here are without any DRC and ERC errors. I also used 180nm technology to design these. To simulate everyone we must need a spice code, you can know more details by the upper links.